Course Syllabus: EE 260, Spring 2003
Course Web Site:
www-ee.eng.hawaii.edu/~sasaki/EE260/spring03.html
Instructor: Galen H. Sasaki.
-
Email: sasaki@wiliki.
Tel: 956-6103
- Office: Holmes 436
Office Hours: MWF 1130-1220 or by appointment
- Instructor's Web Site:
www-ee.eng.hawaii.edu/~sasaki
Prerequisite: EE160 (or EE 150)
Textbooks and Materials:
- Textbook: "Digital Design: Principles and Practices" by J. Wakerly.
The textbook has its own web site
www.ddpp.com. Check
the web site for errata
(
www.ddpp.com/errata3ed.htm)
It comes with the Xilinx Student Edition 4.2i software for
computer aided design. This version is
very recent, so to download successfully, your PC must
fairly up to date.
Instructions to download can be found at
the Xilinx University
Resource Center at Michigan State University at
xup.msu.edu/license/index.htm. Note when the
instructions ask for a version, choose "Version 4.2i".
- Class Notes: Four copies of the set of the class notes
are on reserve at Sinclair Library under "EE 260 Notes
Spring 2003". You may borrow them for a day to
make a complete copy for yourself. Please do so
within the first two weeks of class.
- At least three (3-1/4 inch) floppy disks for Macintosh or IBM
personal computers.
- A laboratory kit -- more information about the kit later!
- A three ringed folder (your "journal") for the lab.
Organization:
The course is organized into a set of lectures and laboratories:
- Lectures: Holmes 247, MWF, 1030-1120.
- Laboratories: Holmes 451, Tues., 9-12 (Sec 1) or 130-430 (Sec 2).
Topics:
This is the first course on digital circuits (i.e., computer
technology circuits). It will cover basic circuit components and design
techniques. Some of the topics to be covered include
- State diagrams and ASM charts
- Programmable logic such as PROMs, PALs, and PLAs,
- Conversion between ASM chart (or state diagram) to sequential circuits
- Conversion between logic diagrams and combinational circuits made up of
SSI parts such as NANDs, NORs, voltage inverters. Mixed logic.
- Boolean algebra, K-maps, implementation of circuits with simple switches
- Commonly used MSI parts such as multiplexers, demultiplexers, counters,
registers, static RAM.
- Modular design techniques such as iterative partitioning, hierarchical
partitioning, functional partitioning, busses.
- Computer
- Latches, flip flops and timing.
- Representations using bits: binary numbers, twos complement,
sign magnitude, ASCII
Grading:
Your grade for the course will be based on the following:
- Midterm Exam 1 (20%)
- Midterm Exam 2 (20%)
- Final Exam (25%). Holmes 247, See UH Manoa, Schedule of
Classes.
- Lab (30%)
- Homeworks (5%)
The midterm exam dates will be announced at least two weeks before they are
given. Any missed exams, labs, or other assignments will result in a score of
zero. With the exception of the homeworks, the grades will be based on
the standard curve, i.e., A = 90%, B = 80%, C = 70%, and D = 60%.
Drop Dates:
See University of Hawaii at Manoa, Schedule of Classes. There is
an early date to drop a class without a "W" grade. This occurs within
the first few weeks of the semester. There is a second drop date, but
where you will receive a "W" grade. This occurs at least two months
before the end of the semester. For this second date, to drop
requires a written approval of Change of Registration Form from the
instructor and the College of Student Academic Services Dean.
Important:
- You are to take all exams on the scheduled days and times.
There will be no exceptions unless you have a doctor's note explaining
why you could not make it.
- You are expected to come to every lecture and at the beginning
of the lecture. If you have a valid reason to miss a lecture,
then contact Galen Sasaki (email or telephone) before lecture so that he can
save handouts for you.
- Homeworks will be collected in class and at the beginning of class.
No late homeworks will be accepted.
- You must come to every lab, and at the beginning of lab.
Attendance will be taken! If you are late one day, it will result in a 10%
deduction in your overall lab grade (i.e., your overall lab grade will be
reduced by one letter grade). If you are late a second day, you will get
an overall score of zero for the lab.