# EE 361 Lab, Experiment #1

The basic purpose of this lab is to familiarize the student with the parameters of inputs ad outputs of common logic families.

Each group will obtain the following equipment and supplies for this experiment:

1. Proto board (students should bring their own).
2. Wire
3. Integrated circuits:
• 7404 TTL
• 74LS04 TTL
• 74S04 TTL
• 74H04 TTL

## Part 1. Measurement of Output Characteristics

The following procedure will allow the student to determine the absolute maximum voltage and current capabilities of the device. These parameters are not really useful in the design of cascaded circuit , but will give the students a feel for what kind of open circuit and short circuit voltages and current can be expected. care should be taken when measuring short circuit currents to avoid leaving the meter hooked up. A quick measurement of the current value will suffice since TTL logic can withstand short circuit currents for a maximum of 10 seconds with no damage to the device. Be extremely careful when making current measurements to avoid connecting the meter directly across the power supply. The lab TA will explain this point if there are any questions. Have the lab TA check your initial setup before applying power to your board.

### 1.1. Source capabilities of common TTL logic families.

Objective: Measurement of VOH ad IOH absolute maximums, and determining of source impedence.

Procedure: Set up the circuit. Insert logic "0" into the inverters input (pin 3). Carefully set the meter on the 5 V range and measure the open circuit voltage VOH by hooking the negative lead to the ground ad touching the output pin 4 with positive lead.Measure the short circuit source current by setting the meter to read milliamperes.Leave the negative lead of the meter hooked to the ground and carefully touch the pin4 of the device with the positive lead and take the reading. Be extremely careful not to touch 5V power supply.

### 1.2. Sink capabilities of common TTL logic families.

Objective:Measurement of VOL.

Procedure: Insert a logic "1" into an inverter input by connecting pin2 to pin 3. Set the meter on 5V range and measure te open circuit voltage, VOL.

### 1.3. Measurement of real DC Source capabilities:

Procedure: Hookup the circuit as shown in the circuit diagram.Adjust the resistance box for a minimum logic "1" level of 2.4 Volts. Record the voltage and resistance readings. Calculate the maximum current the device can source while producing a valid logic at the output.

### 1.4. Measurement of real DC sink capabilities:

Procedure: Hook up the circuit as shown in the circuit diagram. Adjust the resistance box for a maximum logic "0" level of 0.8 Volts. Record the voltage and resistance reading. Calculate the maximum current the device can sink while producing a valid logic level at the output.

## Part 2. Measurement of Input Logic Characteristics

### 2.1. Measurement of an inputs DC source capabilities:

Procedure: Hook up the circuit as shown in the circuit diagram. Adjust the resistance box for a maximum logic "0" level of 0.8V. Record the voltage and resistance reading. Calculate the devices typical input source current.

## Part 3. Calculation of Fanout for Logic States

1. Calculate the DC fanout for both logic levels using your lab results.
2. Note: When you do the calculation for logic "1' case the inverter input is acting as a sink and no procedure is given for that parameter.Lookup the parameter in TTL databook.Why can't you measure the input sink parameter in the lab?
3. Compare the lab results to the TTL calculated results using the TTL databook. Explain why you think the DC results differ from the calculated ones?
4. Why is the fanout calculated using the logic "1" usually meaningless in the use of TTL logic family circuits?
5. Explain why fanout is so important in logic design?