EE 361L      Fall 2005

Last updated November 2, 2005

Objectives

The laboratory course objectives are (i) to apply micro-controllers to design, (ii) research issues of processor design, (iii) understand and apply HDL and FPGA technologies and tools, (iv) understand and implement a processor, (v) write technical reports, and (vi) give a clear oral presentation on a technical topic.  The following are more details about the objectives.

The lab is Writing Intensive. Therefore, lab reports will be graded for writing style, which will count towards around 50% of the overall grade. Good communication skills are important for any successful engineer.

Topics Covered

The laboratories are organized as follows, where each lab assignment covers one or more lab sessions (3 hrs/session). 

Course Outcomes

Teaching Assistant (TA) Information

Instructions

  1. You must attend every lab on the scheduled days and times, and come on time. You may be excused only if you have a doctor's note with a valid reason. If you must miss a lab then contact the T.A. Ashok (email or telephone) before the Lab.
  2. Each individual is required to submit their own individual lab report except for Assignment 3 Computer Reports, which requires a group report. Lab reports will be collected at the beginning of the session, unless notified otherwise. No late reports will be accepted. Note that this laboratory satisfies the writing intensive (WI) requirement. Therefore, the reports will be graded on writing style. Each report must follow the format explained here. The following are link(s) to additional guidelines to write good reports.
  3. Read lab handouts before coming to labs to help insure that assignments are completed on time.
  4. Use the computers and other equipment in the Laboratory for the intended experiments and not for personal use.
  5. Do not damage any kind of laboratory equipment. You can be held responsible.
  6. Follow the Lab Safety Rules for your own security!!!

Grading Policy

Grading is based on lab reports and demonstrations, i.e., presentations to the TA that the assignment was carried out partially or to completion. Each assignment is graded as follows: Grades are based on the following standard curve:

Textbook and Reading Assignments

We have a textbook for the lab course, Advanced Digital Design with Verilog HDL by M. Ceiletti  Prentice-Hall.  It covers design methods for the Verilog Hardware Description Language (HDL) and field programmable gated arrays (FPGAs).  This will be useful for Lab Assignments 4.1, 4.2, and 5

List of Assignments