EE 361 Fall 2004 Lecture Schedule and Notes

What's New

Overview

This is an overview of the topics to be covered.

I. Instruction Set Architecture (and Assembly Language): (Approximately 4 weeks). Sub-topics to be covered

Instructions that a computer can execute.
Assembly language
Compiling, and other related operating system software.
Data representation
Subroutines and Stacks
Exceptions (interrupts)

II. MIPs Processor Design: (Approximately 3.5 weeks). Sub-topics to be covered

Review of digital circuit parts and design techniques.
- Parts: registers, register files, RAM, combinational circuits, sequential circuits (Mealy machines), multiplexers, demultiplexers, and tri-states.
- Design Techniques: modular design, ASM charts, state diagrams, design procedure from state diagrams or ASM charts to sequential circuits.
- Verilog HDL -- structural Verilog.
Single-Cycle MIPS Processor
Multi-Cycle MIPS Processor
Performance: critical paths, propagation delays, set-up times, holding times.

III. Processor Component Design: (3.5 weeks).

ALU: implementing integer arithmetic, iterative partitioning in space and time, multiplication, division, and Booth's algorithm.
Controller: design techniques such as one-hot encoding and microprogramming.
Performance.

IV. Other Important Stuff: (2 weeks).

Memory Hierarchy: caching, virtual memory.
Floating point

Lecture Notes

Intro
MIPSa
MIPSb
MIPSc
Arith
IO
CircRev
SingleMIPS
MultiMIPS
ALU
Memory
Hardware design tips (ppt) (pdf version)
Electronic Design Automation (EDA)

Instruction Set Architecture - Assembly Language (MIPS)

Topic	Subtopic	Reading Assignments		Dates
Topic	Subtopic	Textbook	Notes	Dates
Introduction	Introduction and machine performance.	Chap. 2 and in particular Secs. 2.1-2.3, (skip 2.4), 2.5-2.7. [Optional: Read Chap. 1 and the rest of Chap. 2.].	Intro 1-17	8/23, 8/25
Instruction Set Architecture -- Assembly Language (MIPS)	Instructions and operands.	Sec. 3.1-3.3	MIPSa 1-15	8/27,8/30
	Instruction format, assembly language and branching/jumping.	Sec. 3.4-3.5.	MIPSa 16-36	9/1
	C functions and stacks.	Sec. 3.6.	MIPSb 1-18	9/3, 9/8
	Addressing modes, immediate addressing, PC-relative adressing.	Sec. 3.7 (this section is about text characters, which will be discussed later in the course), 3.8.	MIPSb 19-29	9/10
	Passing parameters through registers and stack	Sec. 3.9, and A.1. Note that the topics of Sec 3.9 will be discussed in a later lecture.	MIPSc 1-11	9/13
	Function calls in MIPs, stack frames, some details about the MIPs assembly language.	Sec. A.2, A.5, and A.6.	MIPSc 12-19	9/15
	Big picture: assemblers, linkers, and loaders.	Sec. A.3, A.4.	MIPSc 20-30	9/17
	Mopping up: arrays versus pointers, properties and rules of thumb, CISC.	Secs. 3.11, 3.12 (optional), 3.13 (optional).	MIPSc 31-33	9/17
Review of number representation and a brief discussion of exceptions	Review positional number systems, addition, conversion from binary to octal and hex, unsigned integers, signed numbers.	Sec. 4.1-4.2.	Arith 1-14	9/20
	Signed numbers, twos complement, negation, addition	Sec. 4.3.	Arith 15-28	9/22
	Exceptions	Sec. 5.6. but from page 410 to the middle of page 413.	IO 1-18	9/24,9/27
Review of digital logic, and a review of hardware description languages and FPGAs	Review of Basic Parts: combinational circuits, truth tables, logic operations, and Verilog HDL and modules	CircRev 1-11	CircRev 1-11	9/29
	Sequential circuits and verilog.	CircRev 12-23. Verilog manual reading assignment from homework	CircRev 12-23	10/1
	Sequential Circuits, Mealy machines, ASM charts, and state diagrams.	CircRev 22-32	CircRev 22-32	10/4
	Overview of FPGAs
Single cycle MIPS processor	Overview of datapath	Sec. 5.1-5.2.	SingleMIPS 1-13	10/6
	Finish overview of datapath	Sec. 5.3.	SingleMIPS 14-26	10/8
	Exam 1			10/11
	Control		SingleMIPS 27-38	10/13,15
	Review Exam 1			10/18
Multi cycle MIPS processor	Introduction	Sec. 5.4.	MultiMIPS 1-8	10/20
	Datapath	Sec. 5.4.	MultiMIPS 9-15	10/22
	State diagram of controller		MultiMIPS 16-24	11/1
	Hardware design tips on verilog and 16 bit version if Single Cycle MIPS		Hardware design tips	10/25-10/29
	One hot encoding		MultiMIPS 25-34,47-48	11/3
	Microprogramming	Sec. 5.5. and App. C.	MultiMIPS 35-48.	11/5
Processor Component Design: ALU	Logic operations (AND, OR, Compl., XOR), simple ALU by iterative partitioning in space.	Sec. 4.4.	ALU 1-4,70-74	11/8
	Carry-lookahead and carry-save, shifting, barrel shifter, cross-bar switch.	Sec. 4.5.	ALU 5-19	11/10
	Three versions of unsigned multiplying. Booth's algorithm for signed multiply.	Sec. 4.6.	ALU 20-43	11/12
	Division.	Sec. 4.7.	ALU 44-54
	Floating point definitions and hardware	Sec. 4.8.	ALU 55-69.
Memory Hierarchy	RAM -- dynamic and static	Sec. 7.1-7.2	Memory 1-14
	Caches		Memory 15-43
	Virtual Memory	Textbook: Sec. 7.3.	Memory 44-99