EE 361 Homework 9

• December 9, 2002 (mon), at the beginning of class.  Extended even more than a week!
• Hints were handed out in class 11/15/02 (friday).  You can download a pdf version of the document by clicking here.
  

Assignment: (20 pts)

You are to design a single-cycle MIPS processor using Verilog HDL, and the Veriwell simulator. Turn in your code on a diskette. Your code should include a test sequence, which will be given to you in class. The processor is the same MIPS processor we have discussed in class and is presented in the textbook. A block diagram of the processor is shown in Figure 5.29 of the textbook on page 372.

To simplify the design, your MIPS processor only has to execute the following instructions:

• R-type instructions add, sub, and, or, and slt
• lw and sw
• beq
• addi
• j

If you complete the assignment perfectly you can receive up to 15 BONUS points to be added to your Exam 2 score.  If you complete the assignment imperfectly, you can receive some of the BONUS points as follows:

• You get 5 total Exam BONUS points if your verilog implementation can execute the following R-type instructions:  add, sub, and, or, and slt.
• You get 10 total Exam BONUS points if your verilog implementation can execute the R-type instructions above and lw, sw, and beq.

Instructions to Turn In

• hw9Main.V.

Your MIPS module must have the following format.

module Mips(pcout,aluresult,clk,reset,pminstr);


output [31:0] pcout;  // Program counter value  
output [31:0] aluresult;  // Output of the alu.  used for debugging
input clk;   // Clock signal.
input reset; // Reset to clear the program counter (PC).  
             //  if reset = 1 then PC = 0 at the next positive clock edge
             //  if reset = 0 then PC works as normal, i.e., it 
             //     parallel loads at the next positive clock edge.
input  [31:0] instr;  // Instruction from instruction memory.

The projects are as follows:

• Project 1: This project checks whether your processor can execute R-type instructions. Label this project HW9A.PRJ. It should have your MIPS processor, the testbench hw9Main.V, and the instruction memory hw9Test1.V. This program has R-type instructions.
• Project 2: This project checks whether your processor can execute lw, sw, and beq instructions. Label this project HW9B.PRJ. It should have your MIPS processor, the testbench hw9Main.V, and the instruction memory hw9Test2.V. This program has lw, sw, and beq instructions. It loops around a few times, while reading and writing to memory.
• Project 3: This project checks whether your processor can execute addi and j instructions. Label this project HW9C.PRJ. It should have your MIPS processor, the testbench hw9Main.V, and the instruction memory hw9Test3.V. This program loops around a few times and includes the addi and j instructions.

The programs assume that the register file is initialize so that

• $3 = 23
• $4 = 24
• $5 = 25
• $6 = 26
• $12 = 1
• $13 = 3
• $14 = 8

initial
  begin
  RegCell[3]=23;
  RegCell[4]=24;
  RegCell[5]=25;
  RegCell[6]=26;
  RegCell[12]=1;
  RegCell[13]=3;
  RegCell[14]=8;
  end

For example, you can download my register file by clicking here. The initial procedure is at the bottom of the register file module.

The programs also assume that your RAM has at least 16 memory words at memory locations 0, 4, 8, .....

• If Project 1 works then 5 points are added to your Midterm Exam 1.
• If Projects 1 and 2 work then 10 points are added to your Midterm Exam 1.
• If Projects 1, 2, and 3 work then 15 points are added to your Midterm Exam 1.

Turn in your projects on a diskette on December 9 (monday) at the beginning of class. Your diskette should work on a PC. Provide a README file which gives your name, "Homework 9", the date, and the list of projects that work and where you can find them (if they're in folders).