EE 361 Homework 5

Problem A (Memory mapped IO): (2 pts) One of the common ways to implement IO is to make Input/Output (IO) hardware look like memory cells. Then memory accesses (e.g., lw and sw) are used by software to interact with the hardware.

The following is an example of IO hardware. The example hardware is the receiver circuitry from a computer keyboard. The hardware consists of two memory cells:

• Receiver Data Register: Its address is 0xffff0008. (Note that the "0x" prefix indicates a hexadecimal number. Recall that a hexadecimal number is base 16.) When a key is pressed then the corresponding ASCII character is loaded into this 8-bit register. The register is assumed be read only.

  (Note that an ASCII is the way text characters are represented in binary. Section 3.7 of the textbook describes the ASCII code, which translates an 8-bit binary number into a charcter, and vice versa. Figure 3.15 on page 142 shows the code. For example, the 8-bit number with value 65 represents the character "A".

  In the C language, char data type is in the ASCII form.)

• Receiver Control Register: Its address is 0xffff000c . This register has status bits for the Receiver Data Register. In particular, bit 1 of the register indicates when a new ASCII byte has been loaded into the Receiver Data Register. (Note that for a register with 8 bits, the bits are labeled bit 7, bit 6, ..., bit 0, from most significant to least significant.) Bit 1 is equal to "1" if the Receiver Data Register has a new ASCII byte, and is equal to "0" otherwise.

The following assembly language program implements getchar(), the C function that gets a character from the keyboard. It assumes that the character is returned in $2 (in the least significant byte).

getchar:
        lui	$t0,0xffff		# Load the upper half of $t0 with
					#    1111111111111111, and the lower 
					#    half with 0000000000000000. 
wait:
	lbu	$at,0xc($t0)		# Load $at with Receiver Control Reg.
					#    Here we use the  "load byte 
					#    unsigned" instruction (see pg. 
					#    A.65).  
	andi	$at,$at,2		# Mask all bits in $at except bit 1.
					#    Note that the mask is the 
					#    constant 2, which is 
					#    0000..00010 in binary.
	beq	$0,$at,wait		# If no new ACII byte then wait.
	lbu	$2,0x8($t0)		# Put new ASCII byte from Receiver
					#    Data Register into $2
	jr	$31

Note

• See page A.50-A.71 for a list of the MIPs instructions.

Now there are two IO registers to transmit ASCII charcters to a computer terminal.

• Transmitter Data Register: Its an 8-bit register with address 0xffff0000. ASCII character bytes are sent to the terminal from here. The Register has two states: "Ready" and "Not Ready". If the Register is Ready then an ASCII character can be loaded into it (in the low order byte of the register) by using the "sb" ("store byte) instruction (see pg. A-67). Then the Register will send the byte to the terminal. On the other hand, if the Register is Not Ready then it will ignore any "sb" instruction. Note that this Register is write only.
• Transmitter Control Register: Its address is 0xffff0004 . This 8-bit register has status bits for the Transmitter Data Register. In particular, Bit 2 indicates when the Transmitter Data Register is Ready. If the Bit is equal to "1" then the Transmitter Data Register is Ready, and if the Bit is "0" then the Transmitter Data Register is Not Ready.

Write an assembly language subroutine that implements putchar(char c), the C function that outputs a character. The argument "c", which is an ASCII byte, is passed through the least signifcant byte of register $a0. You may use registers $at and $t0 for temporary storage.

By the way, these little programs are called drivers.

Problem B (not graded, 0 pts) In the Bucknell Verilog Handbook, there's a First Verilog Program. Get that program to work. Use the verilog simulator called Veriwell. There's a copy of Veriwell in the "Veriwell" Folder on the EE PC Server (it has a green square icon). You can also download a zipped version of Veriwell from our EE 361 web site. Skim through the Bucknell Verilog Handbook and in particular Sections 1 and 2. Run the Veriwell simulator. The handbook has description of using the Veriwell simulator in Section 3, which you should skim through as well. But it's for an old version of the simulator. The following are some hints for the simulators we have on the PCs:

• There are two types of files for Veriwell: project files (usually with the ".prj" suffix) and verilog files (usually with the ".v" suffix).
• Verilog files contain verilog code, that models digital circuits. You can create these files using the options under the File menu. In particular you can create New verilog files, or Open and edit old ones. You could use other editors to create verilog files, but the Veriwell editor is convenient because it highlights your code in color.
• Project files indicate collections of verilog files that are to be "compiled" and run. You can create, edit, and run projects by using the options under the Project menu.
• Create a verilog file for your First Verilog Program. Then create a project for it. Note that there is only on verilog file for the project. You can now run the project, and you should get an output as shown in the handbook.

It's important to do the problem even though it's not graded.. Later we will use another simulator rather than veriwell.  But veriwell is simpler and is the one mentioned in the Bucknell Verilog Handbook.